1. Field of the Disclosure
The disclosure relates to a voltage-level converter and more specifically to a high-speed voltage-level converter for use in a digital-to-analog converter.
2. Description of the Related Art
A voltage-level converter converts a signal in a voltage level to another signal at another voltage level. In modern integrated circuits (ICs), different components operate in different voltage levels to reduce the overall power consumption without degrading their performance. However, the signal generated by a circuit operating in one voltage level may be incompatible for operation with another circuit operating in another voltage level. Therefore, signals generated by the circuit powered at one voltage level are converted to signals compatible with another circuit operating in a different voltage level by using a voltage-level converter.
Voltage-level converters are used in various components, including high-speed and high-accuracy digital-to-analog converters (DACs). The digital logic of a DAC operates with a supply voltage lower than the supply voltage of the analog output stage. Because the digital logic and the analog output stage operate in different voltage levels, a voltage-level converter is used in a DAC to interface the digital logic of the DAC with the analog output stage.
Due to the ever increasing digital processing power and speed of modern chips, the need for DACs with higher sampling speed is on the rise. For example, 3D high-definition televisions (HDTVs) use DACs with 200 Mega samples per second (MSPS) while telecommunication transmitters use DACs with over 300 MSPS. In addition to the high sampling speed, many of these applications also require very high linearity and high Spurious-Free Dynamic Range (SFDR) in the output analog signal. As the digital logic takes longer time to respond to input signals, jitter is more likely to occur in the analog output because the response delay becomes modulated by external disturbances. Hence, the voltage-level converter should respond promptly to interfacing signals to minimize jitter in the analog output stage.